html5 templates



Reference Stereo Power Amplifier


Strictly balanced architecture

The WIDOR features a completely balanced architecture, with no back and forth conversion. In consequence, two identical amplifiers are employed, one driving the speaker+ and one driving the speaker- terminal. While this doubles costs, it relieves the circuit ground from carrying the speaker return currents, resulting in a clean and unspoilt ground potential.

Ultra wideband design

The high quiescent current design of the preamp and driver stages enables a core speed close to 1.5MHz, slowed down only by input and output filtering to match real word requirements. With filters in place, the small signal as well as full power bandwidth (!) measures an impressive 500 kHz. The lower frequency limit is around 0.3 Hz. No coupling capacitors are used throughout.

Inherently low noise

High resolution audio is intrinsically tied to low noise and low distortion. System noise is the lower resolution limit of an analog system, because it determines the smallest signal not masked by a noise floor. Hence, low noise levels and thus a wide dynamic range are desirable. A-weighted output noise measures 20µV for the WIDOR giving a SNR of 126dB or an equivalent to 21 bit !

Regulated power supply

Every section of the WIDOR amplifier is powered by high speed and low noise linear-voltage-regulators. Even the high current drawing MOSFET output stage is supplied by a tightly regulated supply with an instantaneous current capability of +/- 50A. Ripple and noise free supply rails are essential for the low noise operation of the whole amplifier. It further helps to reduce distortion and improves damping factor.

Lateral MOSFET output stage

The lateral MOSFET transistor originally developed by Hitachi in the late 70’s is probably the only semiconductor power device solely made for audio use. Famous for its tube like characteristic and perfect bias stability under any load conditions, the WIDOR uses a two pairs of tandem devices in each output stage. The H-bridge output transistor array is energized by a heavy duty toroidal transformer running a bank of 350.000µF storage capacitors.